It’s been a long time since I last updated about this project, but I have been working slowly in the background. The current plan is to use a TVP7002 from Texas Instruments which is a triple 10-bit video digitiser. It is a little bit over-kill for my needs – it is able to handle three RGB video signals and I only need one monochrome video signal – but nonetheless it is an interesting chip and will achieve what I need.
I’m replacing the screen on the logic analyser for a few reasons: The CRT is heavy and bulky – replacing it would make the whole thing lighter, an LCD could be brighter and I can add colour to the monochrome display, and on top of this it’s just an interesting project. The most important thing is that the replacement screen is not worse than the old one!
After putting this project on the back burner, I am focusing on it once again. Brian HG on the EEVblog forums suggested that a simple line doubler would make the signal compatible with most modern VGA displays. What that means is that each line in the frame needs to be repeated twice, at double the speed.
Currently we get a new line every 40 microseconds, but this is too slow for most displays to be happy about. Therefore, if we record each line and output it twice at 20 microseconds each most VGA displays will be ok with it.
Last semester I was given a decommissioned HP 1662As Logic Analyzer/Oscilloscope from MIT. This is quite a nice piece of test equipment, if not a little bit old (made in the early ’90s). 68 channels of 250MHz logic analyser and a 2 channel 250MHz oscilloscope are nice specs but a grey-scale CRT display and floppy drive show it’s age.
The trouble is that it is huge. At 442x218x330mm it is far to big to fly back to the UK with me. Considering the CRT takes up about 50% of the space inside I thought it would be an interesting project to try and replace the CRT display with an LCD monitor and shrink the whole package.
I managed to find the service manual.
From the service manual I learnt that the display had a resolution of 500×240 and that the CRT display was connected to the CPU board by only one connector, and so by disconnecting this cable I could remove the entire CRT assembly, hopefully replacing it with my own LCD electronics later.
The signals that look key here are the VSYNC, HSYNC and Video signals which resemble those found on a VGA connector. This looks very promising as it seems the display data will be relatively simple to decode.
Now that I knew where to look, I wanted to see exactly what data was being transmitted.
With only a two channel oscilloscope, I could only look at two of the three signals at a time. First I looked at the HSYNC and Video signals.
This is pretty much what I expected. The HSYNC signal (red) is high most of the time however drops low at the end of every line, exactly every 40us ie at a frequency of 25kHz. The Video signal (blue) varies while the HSYNC signal is high to describe each individual pixel. While VGA would normally have the Video signal being analogue between 0 (black) and 0.7 (full brightness), this video signal seems to only have a few values between 0 and 3.5V which makes sense as the display only shows 8 shades of grey. (Note that I am using 10:1 probes so the signals shown in the picture are 1/10th of the real value).
Next I looked at the VSYNC signal which I would expect to drop low at the end of every frame. The signal does indeed drop low every 16.7ms indicating a screen refresh rate of 60Hz which is pretty standard.
With a VSYNC rate of 60Hz and an HSYNC rate of 25kHz, this implies that there are 417 lines per frame, however the datasheet suggested that there were only 240, so perhaps many of these lines are not actually shown.  These are probably the front porch and back porch, as in VGA[/edit].
More investigation is needed.